The present invention relates in general to semiconductor power field effect transistors (FETs) and in particular to shielded gate trench MOSFETs with improved reverse recovery currents.
Shielded gate trench MOSFETs provide unique advantages over conventional MOSFETs, such as reduced gate-to-drain capacitance Cgd, reduced on-resistance RDSon, and increased breakdown voltage of the transistor. In particular, the placement of many trenches in a channel decreases the on-resistance but also increases the gate-to-drain capacitance. The shielded gate structure solves this problem by shielding the electric field in the drift region from the gate, thereby substantially reducing the gate-to-drain overlap capacitance. The shielded gate structure also allows for reducing the carrier concentration in the drift region to increase the breakdown voltage without impacting the on-resistance of the device. As a result, shielded gate trench MOSFETs have demonstrated superior performance characteristics and high switching speed.
The superior performance characteristics of the shielded gate trench MOSFET make the technology an excellent choice for power switching applications such as the switching converter commonly known as the synchronous buck converter (DC-DC converter). The shielded gate trench MOSFET is particularly suitable for the high-side switch in the synchronous buck converter. However, for the low-side switch which operates as a synchronous rectifier, excessive charge during the reverse recovery of the body diode results in increased power dissipation and reduced converter efficiency. There is therefore a need for reducing the reverse recovery loss in shielded gate trench MOSFETs.